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riscv-non-isa / riscv-c-api-doc

Documentation of the RISC-V C API
https://jira.riscv.org/browse/RVG-4
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Added support for zimop extension #56

Closed JivanH closed 9 months ago

JivanH commented 9 months ago

Added support for Zimop extension. For both open-source compilers: GCC and Clang already prepared corresponding patches. Going to publish them.

cc: @kito-cheng

cmuellner commented 9 months ago

@kito-cheng, any objections?

cmuellner commented 9 months ago

Squashed and merged.

Thanks!

topperc commented 8 months ago

Since these maybe ops can be used to implement real operations like Zicfiss, I think we need to define some additional behavior.

Can they be reordered with loads/stores? Can they be moved across calls? Can they be speculated? Can they be duplicated?

topperc commented 8 months ago

I'm not sure it makes sense to have 32 bit forms of mop intrinsics on RV64? What is the compiler supposed to put in the upper bits? For the bitmanip intrinsics that we did this for, we knew that the upper 32 bits of the input only affected the upper 32 bits of the result or we defined rev8_32 as rev8+sraiw.

For the may-be-ops we don't know what the real instruction will be so we don't know how to treat the upper bits.

jrtc27 commented 6 months ago

What is the actual use case for these existing, rather than giving named ones for specific ones?