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riscv-non-isa / riscv-iommu

RISC-V IOMMU Specification
https://jira.riscv.org/browse/RVG-55
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Can a IOVA be a SPA? #239

Closed baimengwei closed 1 year ago

baimengwei commented 1 year ago

On page 12 there are the following sentences：

The IO Bridge is placed between the device(s) and the system interconnect to process DMA transactions. IO Devices may perform DMA transactions using IO Virtual Addresses (VA, GVA or GPA). The IO Bridge invokes the associated IOMMU to translate the IOVA to a Supervisor Physical Addresses (SPA).

IO Virtual Addresses (VA, GVA or GPA)，without SPA。 Whether the SPA will not be used by the IO device?

ved-rivos commented 1 year ago

The IOMMU employs a two-stage address translation process to translate the IOVA to an SPA and to enforce memory protections for the DMA. Although there is no option to disable two-stage address translation, either stage may be effectively disabled by configuring the virtual memory scheme for that stage to be Bare i.e. perform no address translation or memory protection. That sentence is stating that as far as the IO bridge is concerned it does not know the configured virtual memory scheme. So the IO bridge should not treat an address as a SPA (for example, for address hazarding, or for IOPMP checks, etc.) till it has obtained a translation from the IOMMU. If both stages are programmed to be Bare then of course the IOVA is a SPA as there is no address translation that occurs - but only the IOMMU can make that determination. Hope that helps.

baimengwei commented 1 year ago

thanks, very helpful