riscv-non-isa / riscv-iommu

RISC-V IOMMU Specification
https://jira.riscv.org/browse/RVG-55
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How to invalidate the MSI page table cache?Are the two addresses A in Figure 1 and Figure 2 the same? #278

Closed 18772820305 closed 6 months ago

18772820305 commented 6 months ago

1. 689307860d523b2831ec40fd6d61b425

2. 45d0093ea5625096f4c5a8aef303b533

runninglinuxkernel commented 6 months ago

The instructions of invalid MSI page table have provided at chapter 6.3.3. I think the address A in those two places are the same, GPA. MSI page table doing the address translation of Guest interrupt file from GPA to SPA.

ved-rivos commented 6 months ago

@18772820305 please let me know if there are further questions.

18772820305 commented 6 months ago

Can the ADDR operand of IOTINVAL.GVMA command be a GVA?

ved-rivos commented 6 months ago

No. Please see Table 10 row 3

ved-rivos commented 6 months ago

Closing this issue. Hope that addressed the question. Please feel free to ask if there are further questions.