riscv-non-isa / riscv-sbi-doc

Documentation for the RISC-V Supervisor Binary Interface
https://jira.riscv.org/browse/RVG-49
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SBI 3.0 work? #151

Open andreiw opened 3 months ago

andreiw commented 3 months ago

As part of following up on https://github.com/riscv-non-isa/riscv-server-platform/issues/4, it's occurred to me I've no idea where the current SBI 3.0 draft is. Could someone point me in the right direction? I looked in the obvious places (searching for 'ras' under main branch, looking for a 3.0 draft branch etc)

SiFiveHolland commented 3 months ago

The master branch is the current draft. Injection of RAS events to S-mode is supported by the SSE extension (https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/src/ext-sse.adoc). I'm not aware of anywhere else that RAS intersects the SBI specification.