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RISC-V Processor Trace Specification
https://jira.riscv.org/browse/RVG-88
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How to understand exc_only and er_n in Chapter 9 #109

Closed zhangdujiao closed 3 months ago

zhangdujiao commented 4 months ago

exc_only: Exception or interrupt signalled without simultaneous retirement. Does this mean that current block only contains exception or interrupt, and no other retired instruction? i.e. itype=1/2 and iretire=0?

er_n: Instruction retirement and exception signalled on the same cycle, or Trace notify trigger. Does this mean that current block contains exception or interrupt and also other retired instructions? i.e. itype=1/2 and iretire≠0?

thanks!

IainCRobertson commented 3 months ago

Yes (to both questions)

Iain

From: zhangdujiao @.> Sent: 15 May 2024 08:43 To: riscv-non-isa/riscv-trace-spec @.> Cc: Subscribed @.***> Subject: [riscv-non-isa/riscv-trace-spec] How to understand exc_only and er_n in Chapter 9 (Issue #109)

exc_only: Exception or interrupt signalled without simultaneous retirement. Does this mean that current block only contains exception or interrupt, and no other retired instruction? i.e. itype=1/2 and iretire=0?

er_n: Instruction retirement and exception signalled on the same cycle, or Trace notify trigger. Does this mean that current block contains exception or interrupt and also other retired instructions? i.e. itype=1/2 and iretire≠0?

thanks!

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zhangdujiao commented 3 months ago

Yes (to both questions)

The instruction retired before interrupt or exception must be reported, from"When an interrupt or exception occurs, the final instruction retired beforehand must be traced.", Chapter 3.1.4.

For the condition of "er_n", there are no less than one retired instruction before interrupt or exception, like the retired block below: inst.1 inst.2 ... inst.n exception. [itype=1, iretire=N] In this case, how to report the address of inst.n before the exception?

For the case of "exc_only" block below:

——itype=0, iretire=N inst.1 inst.2 ... inst.n ——itype=1, iretire=0 exception. block1 satisfies the in Figure2 Instruction delta trace algorithm, Chapter9. So, the address before the exception (addr of inst.n) can be reported. But, what for the case of "er_n"? by what condition the TE can report the address before except. of int.? Many Thanks!
IainCRobertson commented 3 months ago

I don't see a problem here. When a block of instructions retires, you know:

From this you can compute the address of the last instruction retired in the block. Regarding the er_n case vs exc_only, the only difference is whether you use the last address from the previous block (exc_only) or the current block (er_n).

Iain

From: zhangdujiao @.> Sent: 20 May 2024 12:35 To: riscv-non-isa/riscv-trace-spec @.> Cc: Robertson, Iain (DI SW ICS TST RD EAH) @.>; Comment @.> Subject: Re: [riscv-non-isa/riscv-trace-spec] How to understand exc_only and er_n in Chapter 9 (Issue #109)

Yes (to both questions)

The instruction retired before interrupt or exception must be reported, from"When an interrupt or exception occurs, the final instruction retired beforehand must be traced.", Chapter 3.1.4.

For the condition of "er_n", there are no less than one retired instruction before interrupt or exception, like the retired block below: inst.1 inst.2 ... inst.n exception. [itype=1, iretire=N] In this case, how to report the address of inst.n before the exception?

For the case of "exc_only" block below: --itype=0, iretire=N inst.1 inst.2 ... inst.n

--itype=1, iretire=0 exception.

block1 satisfies the in Figure2 Instruction delta trace algorithm, Chapter9. So, the address before the exception (addr of inst.n) can be reported. But, what for the case of "er_n"? by what condition the TE can report the address before except. of int.?

Many Thanks!

- Reply to this email directly, view it on GitHubhttps://github.com/riscv-non-isa/riscv-trace-spec/issues/109#issuecomment-2120276654, or unsubscribehttps://github.com/notifications/unsubscribe-auth/ALQOPSRDGQ3SAXG6PWVED2LZDHNVDAVCNFSM6AAAAABHXTADGWVHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMZDCMRQGI3TMNRVGQ. You are receiving this because you commented.Message ID: @.**@.>>

zhangdujiao commented 3 months ago

thanks! problem solved