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riscv-non-isa / riscv-trace-spec

RISC-V Processor Trace Specification
https://jira.riscv.org/browse/RVG-88
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Why syncs-start packet is issued after two consecutive exceptions/interruptions? #126

Closed zhangdujiao closed 2 months ago

zhangdujiao commented 2 months ago

What are the principles for this packet sending mechanism?

IainCRobertson commented 2 months ago

Normally, when there is a single trap, the following occurs:

Now consider a pair of consecutive traps. The above case doesn't work, because the instruction after the 1st trap does not retire. So instead we use the following sequence:

There is another case related to exceptions at the targets of indirect jumps (updiscons). In the usual case (the first one above), the instruction which caused the exception is known: it is the instruction which follows the one reported in the format 1 / 2. However, if that instruction is an indirect jump, the decoder doesn't know the target address, and so is unable to determine which instruction caused the exception. So when the exception occurs at the target of an uninferable jump, the following sequence is used:

If a double-trap occurs after an uninferable jump you get

If there are more than 2 consecutive traps, the number of sync-trap packets with thadd=0 increases accordingly.

Iain

From: zhangdujiao @.> Sent: 28 June 2024 09:19 To: riscv-non-isa/riscv-trace-spec @.> Cc: Subscribed @.***> Subject: [riscv-non-isa/riscv-trace-spec] Why syncs-start packet is issued after two consecutive exceptions/interruptions? (Issue #126)

What are the principles for this packet sending mechanism?

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zhangdujiao commented 2 months ago

Thanks Iain, great to have you! Made me have a deeper understanding of the mechanism. still a little question for the quoted scene, it seems Sync-start will issue in the last from figure 9.1, since <reported?> is satisfied. So, the address of the 1st instruction that retires after the 2nd trap will be reported by sync-start packet, am I right?

Now consider a pair of consecutive traps. The above case doesn't work, because the instruction after the 1st trap does not retire. So instead we use the following sequence: Format 1 or 2 indicating last instruction retired before the trap Sync-trap with thaddr = 0 reports the cause of the 1st trap (and the address of the instruction which raised the exception). * Sync-trap with thaddr = 1 reports the cause of the 2nd trap and the address of the 1st instruction that retires after the 2nd trap

IainCRobertson commented 2 months ago

Yes, exactly.

Iain

From: zhangdujiao @.> Sent: 29 June 2024 03:24 To: riscv-non-isa/riscv-trace-spec @.> Cc: Robertson, Iain (DI SW ICS TST RD EAH) @.>; Comment @.> Subject: Re: [riscv-non-isa/riscv-trace-spec] Why syncs-start packet is issued after two consecutive exceptions/interruptions? (Issue #126)

Thanks Iain, great to have you! Made me have a deeper understanding of the mechanism. still a little question for the quoted scene, it seems Sync-start will issue in the last from figure 9.1, since <reported?> is satisfied. So, the address of the 1st instruction that retires after the 2nd trap will be reported by sync-start packet, am I right?

Now consider a pair of consecutive traps. The above case doesn't work, because the instruction after the 1st trap does not retire. So instead we use the following sequence: Format 1 or 2 indicating last instruction retired before the trap Sync-trap with thaddr = 0 reports the cause of the 1st trap (and the address of the instruction which raised the exception). * Sync-trap with thaddr = 1 reports the cause of the 2nd trap and the address of the 1st instruction that retires after the 2nd trap

- Reply to this email directly, view it on GitHubhttps://github.com/riscv-non-isa/riscv-trace-spec/issues/126#issuecomment-2197860339, or unsubscribehttps://github.com/notifications/unsubscribe-auth/ALQOPSRS43K2R4CLE6JZOPDZJYLDHAVCNFSM6AAAAABKBMLPACVHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMZDCOJXHA3DAMZTHE. You are receiving this because you commented.Message ID: @.**@.>>