riscv-non-isa / riscv-trace-spec

RISC-V Processor Trace Specification
https://jira.riscv.org/browse/RVG-88
Creative Commons Attribution 4.0 International
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Addition of simple assembly test that should generate example trace messages #52

Closed bmcspadd-seagate closed 3 years ago

bmcspadd-seagate commented 3 years ago

I've written and used this test as stimulus to an implementation of a Trace Encoder. This test should stimulate the creation of format 0/1/2/3 trace messages due to flow control changes caused by branches, jumps, exceptions and interrupts.

Bill Mc.