riscv-non-isa / riscv-trace-spec

RISC-V Processor Trace Specification
https://jira.riscv.org/browse/RVG-88
Creative Commons Attribution 4.0 International
152 stars 47 forks source link

Synchronization packets for privilege change #97

Open AoteJin opened 5 months ago

AoteJin commented 5 months ago

Based on the main text of e-trace spec, the synchronization packets are not yielded for privilege change (e.g. xret):

0

But the Figure 2. Instruction delta trace algorithm implies that synchronization packets are generated for privilege change. It would be better to explicitly include privilege change as a condition of synchronization in main text.

Besides, the the privilege field in format 3 subformat 0 says:

1

Regarding the case with instruction xret, ecall, ebreak, it is better to indicate the the privilege field holds the new privilege after execution of the instruction.