riscv-non-isa / rvv-intrinsic-doc

https://jira.riscv.org/browse/RVG-153
BSD 3-Clause "New" or "Revised" License
281 stars 89 forks source link

Does the project have absolute value functions for int and uint integer vectors? #262

Closed rvvstuding closed 11 months ago

rvvstuding commented 1 year ago

if not, how do I implement them like Floating-Point Absolute Value Functions?

dzaima commented 1 year ago

Two options:

// conditionally negate elements that are less than 0
vbool32_t tmp = __riscv_vmslt_vx_i32m1_b32(x, 0, vl);
vint32m1_t res = __riscv_vneg_v_i32m1_mu(tmp, x, x, vl);
// max(-x, x)
vint32m1_t tmp = __riscv_vneg_v_i32m1(x, vl);
vint32m1_t res = __riscv_vmax_vv_i32m1(tmp, x, vl);

Which is better (if they're not equal) would most likely depend on the specific RVV implementation.

rvvstuding commented 1 year ago

Thank you for your answer, by the way, will there be intrinsics functions like ARM vabs_s8 and x86 _mm_abs_epi8 in the future?

topperc commented 1 year ago

Thank you for your answer, by the way, will there be intrinsics functions like ARM vabs_s8 and x86 _mm_abs_epi8 in the future?

Intrinsics usually represent a single instruction. ARM and X86 have sing instruction abs. RISC-V does not.

You could also do vmax with the value and a negated version of the value. Depending on hardware that might chain better, but have higher register pressure for larger LMUL.

nick-knight commented 1 year ago

You could also do vmax with the value and a negated version of the value. Depending on hardware that might chain better, but have higher register pressure for larger LMUL.

This is the second option @dzaima mentioned. But they added that in an edit to their original post, so if you were coming here from your email you may have missed it. Agreed about the tradeoffs.