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riscv-non-isa / rvv-intrinsic-doc

https://jira.riscv.org/browse/RVG-153
BSD 3-Clause "New" or "Revised" License
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Question about the rounding mode of the bit right shift functions #274

Closed rvvstuding closed 10 months ago

rvvstuding commented 11 months ago

Hi, everyone. The result I get when using the function vint8m1_t __riscv_vsra_vx_i8m1 (vint8m1_t op1, size_t shift, size_t vl)is truncated. And these functions don't seem to use dynamic rounding mode. For example, if int8_t 35 shifts 2 bits to the right, the result is 8. Then I changed the value of the Fixed-Point Rounding Mode Register vxrm (set vxrm = 0) and got the same result. Are there variations of these functions that implement the rounding mode ? If not, how can I implement such as rnu (round-to-nearest-up) ? Thanks!

dzaima commented 11 months ago

The __riscv_vssra_* intrinsics are the ones that take a rounding mode argument, e.g. __riscv_vssra_vx_i8m1(op1, 2, __RISCV_VXRM_RNU, vl).