Timer1 registers have the wrong size

riscv-rust / gd32vf103-pac

Peripheral access crate for GD32VF103

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Timer1 registers have the wrong size #3

Closed cculpepper closed 3 years ago

cculpepper commented 4 years ago

https://github.com/riscv-rust/gd32vf103-pac/blob/d98f791d2d4a39253b7b55182c147d56252563c0/src/timer1.rs#L281

I could be wrong about this, but it looks like timer 1 has the wrong size for the capture registers. They are set as u32, but the user manual and the svd have them as u16. The user manual does say these can be accessed as 32 bit words, so if my issue is in error, let me know.

Disasm commented 4 years ago

For some reason in SVD it's defined as 16-bit for TIMER0 and as 32-bit for TIMER1. I don't think it matters. Generated code looks correct to me.

Disasm commented 4 years ago

Since CHxCV and DMATB registers are the only 32-bit-declared ones in TIMER1, they could be patched, but I don't think it's necessary unless you have strong feelings about it.

cculpepper commented 4 years ago

Nope, no strong feelings. Just thought it odd, and wanted to make sure I wasn't going crazy.