riscv-software-src / riscv-isa-sim

Spike, a RISC-V ISA Simulator
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Don't print vregs in interactive mode if no V extension exists #1715

Closed abejgonzalez closed 3 months ago

abejgonzalez commented 3 months ago

1701 changed Spike's ISA parsing to avoid setting a default VLEN/... if no V extension was found. This broke the interactive vreg N command (which assumed VLEN and ELEN would be set by default and would be non-zero) by throwing a 0/0 FP exception. This wraps existing logic in an if and prints a nice message saying no V extensions supported.