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riscv-software-src / riscv-isa-sim

Spike, a RISC-V ISA Simulator
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Implement pointer masking #1718

Open YenHaoChen opened 3 days ago

YenHaoChen commented 3 days ago

This PR implements pointer masking.

YenHaoChen commented 3 days ago

The pointer masking takes effect on all loads and stores. People may want to evaluate the performance impact.

YenHaoChen commented 21 hours ago

We want to handle this via the TLB rather than by adding more instructions to the critical code path.

(A single address would then occupy multiple entries in the TLB, one for each pointer-masking value that is used, but that is preferable.)

I am working on this and need a few days.

I aim to have a single entry for each address at runtime and flush TLB upon updating the pointer-masking value. This way, we don't need to obtain the pointer-masking value before looking up TLB.

(We must obtain the pointer-masking value for TLB lookup if we allow each address to occupy multiple entries. Obtaining the value before TLB lookup would add more instructions to the critical code path and hamper system performance.)

Please let me know if this proposal would satisfy your requirements.

aswaterman commented 19 hours ago

My requirement is that the code sequence for TLB hits is completely unchanged, and all of the new code is on the TLB refill path.