Vector 1.0 Support VALU

riscv-software-src / riscv-perf-model

Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model

Apache License 2.0

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Vector 1.0 Support VALU #167

Closed AaronGChan closed 2 weeks ago

AaronGChan commented 2 months ago

PR Goals: Implement basic vector support for VALU operations, UOp generation for LMUL > 1, and vset support. The goal in this stage to design all necessary components to support a vadd.vv instruction with varying LMUL and SEW values set.

Documentation: https://github.com/riscv-software-src/riscv-perf-model/discussions/89#discussioncomment-9324963

kathlenemagnus commented 1 month ago

This is a lot of really great work @AaronGChan!

AaronGChan commented 2 weeks ago

@kathlenemagnus-mips I think you need to approve on your other account for me to be able to merge.