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riscv-software-src / riscv-pk

RISC-V Proxy Kernel
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Pk doesn't recognize vector instructions #305

Closed kosmalex closed 1 year ago

kosmalex commented 1 year ago

I m trying to simulate rvv 1.0 kernels using rvv-toolchain, spike and pk. I built everything like this;

TOOLCHAIN:

$ git clone <the latest repo> && cd <repo name>
$ mkdir build
$ cd build
$ ../configure --prefix=$ROOT/opt/rv64 --with-arch=rv64gcv

SPIKE: (I already have installed the device tree compiler)

$ git clone <the latest repo> && cd <repo name>
$ mkdir build
$ cd build
$ ../configure --prefix=$ROOT/opt/spike --with-isa=rv64gcv --with-varch=vlen:256,elen:64 --with-target=riscv64-unknown-elf

PK:

$ git clone <the latest repo> && cd <repo name>
$ mkdir build
$ cd build
$ ../configure --prefix=$ROOT/opt/pk --with-arch=rv64gcv --host=riscv64-unknown-elf

Once I build and run a dummy app an illegal instruction error is generated, pointing to the single vector instruction in the binary. image

The weird part is that I checked mstatus and misa csrs, and the vector extension bits are enabled. The only problem is that the pk does not recognize the vector instruction encoding. The function dumping the error is located in the $ROOT/opt/pk/pk/handlers.c source file.

kosmalex commented 1 year ago

I actually didn't call the vsetvl instruction before using vector instructions. That's why spike detected vector instructions as illegal instructions and forwarded the trap to pk, so I thought pk was at fault.