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Use Zvl/Zve to communicate VLEN/ELEN to target in debug tests #567

Closed jerryz123 closed 5 months ago

jerryz123 commented 5 months ago

Goes with https://github.com/riscv-software-src/riscv-isa-sim/pull/1701

jerryz123 commented 5 months ago

Oops, I think this needed to be a merge-commit, not a squash-commit, such that riscv-isa-sim can find it.

jerryz123 commented 5 months ago

I'll fix up riscv-isa-sim