riscv-software-src / riscv-tools

RISC-V Tools (ISA Simulator and Tests)
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Could I know if Riscv GCC support to place code section into one special area? #122

Closed zcy618 closed 6 years ago

zcy618 commented 7 years ago

hi I meet one issue that I am using SCR1, and For example, I add TCM area in my ld file: MEMORY { RAM (rwx) : ORIGIN = 0x0, LENGTH = 64K TCM (rwx) : ORIGIN = 0x00480000, LENGTH = 64K }

.tcmdata : { (.inputdata1section) (.inputdata2section) (.output1section) (.output2section) (.farRef) (.NLMSWf_FG) (.estEchoReal) (.estEchoImag) . = ALIGN(4); (.IP_Code); . = ALIGN(4); } > TCM

And I add IP_Code before my function: attribute((section(".IP_Code"))) void TCM_HWCFFTcompute() { ......... }

But from dump file, I could see that there is no IP_code section:

Disassembly of section .tcmdata:

00480000 : ...

00480400 : ...

00480800 : ...

00480c00 : ...

And I also check the wav in Modelsim that I could confirm that there is no instruction from TCM area. But if I use the same method on other platform, such ARM, TI DSP, it could work. So could you help to tell me how to put code part into one special area please? From current issue appearance, it seems compiler does not recognize the code section so that it does not put the function into IP_Code section. Do you know why please? Thanks.

jim-wilson commented 6 years ago

attribute section is a generic gcc feature, that should work on all elf targets, including riscv.

Your linker script is telling the linker to combine the .IP_Code section into the .tcmdata section, so there will be no .IP_Code section in the linked output. Only the .tcmdata section. This is how it is supposed to work.

I tried a simple testcase and got the expected result, with the code in the .tcmdata section. In general, it isn't a good idea to combine data and text sections together, but otherwise what you are doing should work.

I don't see any problem here.