Closed timsifive closed 6 years ago
I'm concerned that 'debug_defines.h' is different across riscv-isa-sim and riscv-openocd, and neither is up to date with the actual riscv-debug-spec
. I don't feel so strongly about it to prevent this PR, but can we open a follow-up issue to track it? This seems likely to cause confusion with anyone using this repo as a model for how to interact with the debug spec.
Correction to my above comment, it looks like riscv-isa-sim
is up to date with the current spec, but OpenOCD doesn't match riscv-isa-sim
.
Don't merge this. HiFive1 flashing is broken.
If HiFive1 flashing is broken, it's likely that read_memory or write_memory is not idempotent on failures. Just a guess.
HiFive1 flashing was fixed by https://github.com/riscv/riscv-openocd/pull/156
OpenOCD now works with much smaller program buffers. Spike implements that to test against.
OpenOCD tells GDB what registers exist, and GDB exposes only those registers.