Hi,
we've been trying to cross-compile our own program to run on zedboard. Following the installation of the toolchain, and following this section (https://github.com/riscv/riscv-tools#-testing-your-toolchain) the problem we encountered is that even though the "Hello world" example works well with spike simulator, it does not work on the zedboard.
We try to run the program following these instructions (https://github.com/ucb-bar/fpga-zynq#38--booting-up-and-interacting-with-the-risc-v-rocket-core):
./fesvr-zynq pk hello
where hello represent the "Hello world!" example from this git. The idea is to run the program through front end server (that runs on linux on arm) that provides interface to riscv, but with no success.
We have tried all the combinations including 32/64 bit toolchain and 32/64 bit proxy kernel.
If anyone can provide some guidance it would be greatly appreciated.
Hi, we've been trying to cross-compile our own program to run on zedboard. Following the installation of the toolchain, and following this section (https://github.com/riscv/riscv-tools#-testing-your-toolchain) the problem we encountered is that even though the "Hello world" example works well with spike simulator, it does not work on the zedboard.
We try to run the program following these instructions (https://github.com/ucb-bar/fpga-zynq#38--booting-up-and-interacting-with-the-risc-v-rocket-core): ./fesvr-zynq pk hello where hello represent the "Hello world!" example from this git. The idea is to run the program through front end server (that runs on linux on arm) that provides interface to riscv, but with no success. We have tried all the combinations including 32/64 bit toolchain and 32/64 bit proxy kernel.
If anyone can provide some guidance it would be greatly appreciated.
Kind regards, Mpa123