search

riscv / riscv-CMOs

https://jira.riscv.org/browse/RVG-59
Creative Commons Attribution 4.0 International
76 stars 12 forks source link

Clarify prefetch instruction permission #59

Closed whchiao closed 4 months ago

whchiao commented 1 year ago

In CMO's spec, it claims "A cache-block prefetch instruction is permitted to access the specified cache block whenever a load instruction, store instruction, or instruction fetch is permitted to access the corresponding physical addresses."

does that mean

  1. prefetch.i is permitted to access the specified cache block if instruction fetch is permitted to access the corresponding physical addresses. prefetch.r is permitted to access the specified cache block if a load is permitted to access the corresponding physical addresses. prefetch.w is permitted to access the specified cache block if a store is permitted to access the corresponding physical addresses. or
  2. Any prefetch instruction (prefetch.i / prefetch.r / prefetch.w) is permitted to access the specified cache block whenever a load instruction, store instruction, or instruction fetch is permitted to access the corresponding physical addresses."
dkruckemyer-ventana commented 1 year ago

The intent was the latter (number 2). Since the prefetch instructions are encoded as hints, we don't do any permissions checks, even though the standard address translation applies. The different suffixes really are hints to the memory system for allocation into specific caches (e.g. instruction cache or data cache), with specific cache state permissions (e.g. shared, i.e. read-only, or unique, i.e. read-write), rather than indicating an actual memory operation.