Does mstateen0[58]=0 take precedence over hstatus.VGEIN=0?

[Jahhow]

AIA spec section 2.3 states that when hstatus.VGEIN=0, indirect register numbers in the ranges 0x030–0x03F and 0x070–0x0FF designate an inaccessible register at VS level, and so attempts from VS-mode to access sireg (really vsireg) raise a virtual instruction exception.

In section 2.5, it says when mstateen0[58]=0, an attempt to access all IMSIC state from a privilege mode less privileged than M-mode results in an illegal instruction trap

I want to make sure when both mstateen0[58]=0 and hstatus.VGEIN=0, the mstateen0[58]=0 rule take precedence over hstatus.VGEIN=0 rule, so from VS-mode to access sireg when siselect={0x070–0x0FF} results in an illegal instruction trap.

The possible answer I found was that in section 2.3 it also says that the rules for sireg and vsireg in section 2.3 are overridden by the requirements of Section 2.5, which take precedence over section 2.3 when extension Smstateen is also implemented.

Thank you.

[jhauser-us]

Assuming the hart has an IMSIC, your interpretation is exactly correct. (If a hart does not have an IMSIC, Section 2.5 has something different to say about the effects of mstateen0[58].)