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riscv / riscv-bitmanip

Working draft of the proposed RISC-V Bitmanipulation extension
https://jira.riscv.org/browse/RVG-122
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Meaning of misa.B in relationship to Zba, Zbb, Zbc and Zbs extensions #153

Open Silabs-ArjanB opened 3 years ago

Silabs-ArjanB commented 3 years ago

How does the B bit in the MISA CSR relate to the Zba, Zbb, Zbc and Zbs extensions? If a core implements the Zba, Zbb, Zbc and Zbs extensions should it then also set MISA.B to 1? What if a core for example only implements the Zbb extension?

zhonghochen commented 2 years ago

Here is a related issue https://github.com/riscv/riscv-isa-manual/issues/907

Zoro210 commented 7 months ago

In Zb extension of Zbb, the instruction rolw, is used in 64 or 32-bit representing extensions.