riscv / riscv-cheri

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
https://jira.riscv.org/browse/RVG-148
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Renaming ASR permission #106

Closed arichardson closed 1 month ago

arichardson commented 9 months ago

As has been noted before, ASR grants additional privilege beyond CSR access so the historical "Access System Registers" name may not be the best. Morello uses System which is IMO better, but the abbreviation would conflict with S for Store, maybe Privileged Permission (P)/Elevated Permission (E)/System Management Permission (SM)?

tariqkurd-repo commented 9 months ago

What should the spec of ASR be? What additional state does it allow access to over CSRs?

arichardson commented 9 months ago

I guess you could argue that instructions like xret actually read the CSR so ASR isn't needed for the instruction itself but rather the side-effects of that instruction. We can probably ignore this until there is another non-CSR case that needs elevated privilege.

I do wonder if we should require it for ECALL though...

sorear commented 8 months ago

140 and https://lists.riscv.org/g/sig-cheri/message/68 have a fair amount about other uses for ASR and its fundamental nature as the catch-all for resources, whether architectural or software-defined, accessible in a given privilege mode for which a more specific permission is either not needed or intended to be defined at a higher level using sentries.

Personally of the options given I prefer "Elevated (E)" - Privileged invites confusion with privilege levels, and System Management has implications about resource scope which may not be accurate.

tariqkurd-repo commented 7 months ago

@arichardson do you want to do something about this one? Or shelve it?

andresag01 commented 1 month ago

@arichardson : Can we close this ticket?

arichardson commented 1 month ago

Let's close this and keep it as is.