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riscv-cheri
This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
https://jira.riscv.org/browse/RVG-148
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Clarify that tag is set on DDC when entering debug
#267
Closed
PRugg-Cap
closed
4 months ago
PRugg-Cap
commented
4 months ago
Addresses
https://github.com/riscv/riscv-cheri/issues/263
Addresses https://github.com/riscv/riscv-cheri/issues/263