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riscv-cheri
This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
https://jira.riscv.org/browse/RVG-148
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Fix the malformed check to remove duplicate RV32 bounds encodings
#270
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PRugg-Cap
closed
1 month ago
PRugg-Cap
commented
1 month ago
Fixes
https://github.com/riscv/riscv-cheri/issues/244
Fixes https://github.com/riscv/riscv-cheri/issues/244