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riscv / riscv-cheri

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
https://jira.riscv.org/browse/RVG-148
Creative Commons Attribution 4.0 International
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clarify when prefetches don't prefetch #315

Closed tariqkurd-repo closed 6 hours ago

tariqkurd-repo commented 3 days ago

the malformed cases were missing, and also the cases should be symmetrical between it mode / cap mode which wasn't clear before fixes https://github.com/riscv/riscv-cheri/issues/312

jamie-melling commented 3 days ago

Alexandra/Evangelos has also pointed out that SHADD do not have the same malformed/reserved conditions as CADD

tariqkurd-repo commented 3 days ago

Alexandra/Evangelos has also pointed out that SHADD do not have the same malformed/reserved conditions as CADD

I've fixed that too, please have a look

andresag01 commented 11 hours ago

@tariqkurd-repo : I expanded the information to make it clearer instead of using cross-references.