riscv / riscv-cheri

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
https://jira.riscv.org/browse/RVG-148
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Reword the scss instruction. #316

Closed buxtonpaul closed 2 months ago

buxtonpaul commented 3 months ago

The scss description includes a note for comparison to the v9 spec. The note incorrectly referred to the v9 instruction as not having the default capability behaviour when in fact it is the renamed scss instruction which doesn't. Corrected the name and reordered the note to clarify this.