riscv / riscv-cheri

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
https://jira.riscv.org/browse/RVG-148
Creative Commons Attribution 4.0 International
47 stars 28 forks source link

Chapter 3 note about the relationship between privileged and unprivileged components #321

Closed jasonyu1996 closed 6 hours ago

jasonyu1996 commented 2 months ago

Related to discussions in #317

This adds a note at the beginning of chapter 3 to clarify the split privileged/unprivileged design that mirrors the base RISC-V ISA.