This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
Allow implementations supporting CHERI RISC-V to use alternative capability encodings that provide most key features, such as bounds and permissions, but may change, for example, the granularity of bounds or offer additional features. Also, allow the sentry instruction to become an illegal when using alternative capability encodings that do not provide ambient sealing permission.
The paragraph allowing alternative encodings is largely inspired from the paragraph in the RISC-V Privileged Specification that allows alternative privileged ISA designs.
Allow implementations supporting CHERI RISC-V to use alternative capability encodings that provide most key features, such as bounds and permissions, but may change, for example, the granularity of bounds or offer additional features. Also, allow the
sentryinstruction to become an illegal when using alternative capability encodings that do not provide ambient sealing permission.The paragraph allowing alternative encodings is largely inspired from the paragraph in the RISC-V Privileged Specification that allows alternative privileged ISA designs.
Fix #324