Add section on pointer masking

riscv / riscv-cheri

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.

https://jira.riscv.org/browse/RVG-148

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Add section on pointer masking #360

Closed tariqkurd-repo closed 2 months ago

tariqkurd-repo commented 2 months ago

integer pointer mode can work with pointer masking, as the upper address bits are not used in the capability calculations, as PCC / DDC are unaffected

capability pointer mode is affected and will need more work to make it compatible as it changes the capability bounds interpretation

this text needs adding