riscv / riscv-cheri

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
https://jira.riscv.org/browse/RVG-148
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add auipc note #390

Closed tariqkurd-repo closed 2 months ago

tariqkurd-repo commented 2 months ago

fixes https://github.com/riscv/riscv-cheri/issues/389

tariqkurd-repo commented 2 months ago

@davidchisnall