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riscv / riscv-cheri

This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory protection and scalable compartmentalization.
https://jira.riscv.org/browse/RVG-148
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improve dinfc wording #420

Closed tariqkurd-repo closed 1 month ago

tariqkurd-repo commented 1 month ago

the wording about which instructions execute in the new mode after modesw was ambiguous