riscv / riscv-control-transfer-records

This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usages associated with profiling and debug.
https://jira.riscv.org/browse/RVG-62
Creative Commons Attribution 4.0 International
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Detect Docker robustly #5

Closed a4lg closed 8 months ago

a4lg commented 10 months ago

&> /dev/null works as a redirection from stdout and stderr to /dev/null in Bash but not in POSIX shell (considered as an asynchronous execution and the result of the command command cannot be retrieved).

As a result, it always assumes that Docker always exists.

This commit makes the redirection robust and portable (uses >/dev/null 2>&1 instead, makes it possible to detect "no Docker" condition correctly).

This is a port of now merged riscv/docs-spec-template#14.