riscv / riscv-fast-interrupt

Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
https://jira.riscv.org/browse/RVG-63
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Redundant note in smclicshv section #298

Closed christian-herber-nxp closed 1 year ago

christian-herber-nxp commented 1 year ago

Section smclicshv Changes to CLIC Interrupt Pending reproduces the following note twice:

To improve performance, when a vectored interrupt is selected and serviced, the hardware will automatically clear a corresponding edge-triggered pending bit, so software doesn’t need to clear the pending bit in the service routine.

Seems an obvious typo that happened when refactoring.

dansmathers commented 1 year ago

closed with pull #299. thanks for pointing it out.