riscv / riscv-fast-interrupt

Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
https://jira.riscv.org/browse/RVG-63
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stateen register required to block access to new ssclic CSRs? #345

Closed dansmathers closed 1 year ago

dansmathers commented 1 year ago

ssclic adds stvt, snxti, sintstatus, sintthresh, sscratchcsw, sscratchcswl CSRs. Do these new supervisor CSRs have to be protected by the Smstateen extension and documented in clic spec? Add documentation like for JVT CSR in Zcmt extension?

kasanovic commented 1 year ago

Closed with https://github.com/riscv/riscv-fast-interrupt/commit/a62512916a6b42e9a37bc963933ec03a21b7a031