riscv / riscv-fast-interrupt

Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
https://jira.riscv.org/browse/RVG-63
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Reserved ranges in memory mapped registers #351

Closed christian-herber-nxp closed 1 year ago

christian-herber-nxp commented 1 year ago

The Smclic section is specific on which memory mapped addresses are considered reserved. Same is not the case for Ssclic and Suclic. There, some regions are not explicitly listed (0x0001 - 0xFFF)

In fact, I believe the first reserved region in Smclic is incorrect. Instead of

0x0008-0x003F reserved

should be

0x0001-0x003F reserved

As there is only a single byte reserved for smclicconfig

kasanovic commented 1 year ago

Closed by #352