riscv / riscv-fast-interrupt

Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
https://jira.riscv.org/browse/RVG-63
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Smclic section contains a lot of changes relevant only to S-mode #409

Open christian-herber-nxp opened 1 week ago

christian-herber-nxp commented 1 week ago

The CLIC specification has two main extensions, Smclic and Ssclic. However, the Smclic specification mixes m-mode only and general statements. Examples:

The latter one even mixes references to x-CSRs and m-CSRs This is an attempt to reduce the amount of copy paste in the specification, which is good. The privileged specification goes full copy paste between supervisor and machine mode CSRs.

I think there is no good solution, but at least things need to be reviewed and corrected where needed. The real solution would be to make self-contained Smclic and Ssclic chapters.