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riscv / riscv-fast-interrupt

Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
https://jira.riscv.org/browse/RVG-63
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In Appendix, we should not have CLIC interrupt ID recommendation chapter. #426

Open jb-brelot-nxp opened 1 month ago

jb-brelot-nxp commented 1 month ago

Appendix F: CLIC Interrupt ID ordering recommendations is indicating how we can potentially compress the vector table.by using another mapping,

We are recommanding to follow just the first mapping :

ID Interrupt Note

0 reserved 1 ssip Supervisor software Interrupt 2 reserved 3 msip Machine software interrupt

4 reserved 5 stip Supervisor timer interrupt 6 reserved 7 mtip Machine timer interrupt

8 reserved 9 seip Supervisor external (PLIC/APLIC) interrupt 10 reserved 11 meip Machine external (PLIC/APLIC) interrupt

12 reserved 13 reserved 14 reserved 15 reserved

16 csip CLIC software interrupt 17+ inputs CLIC local inputs