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RISC-V Instruction Set Manual
https://riscv.org/
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Is there any GCC support for Smrnmi? #1651

Closed Silabs-ArjanB closed 1 month ago

Silabs-ArjanB commented 2 months ago

Hi,

Is there any GCC support for Smrnmi? Specifically I am looking for an equivalent of the 'interrupt' attribute which would add an mnret instruction instead of an mret instruction as the epilogue (so that we don't have to write the interrupt handler entirely in assembly.

Best regards, Arjan

aswaterman commented 2 months ago

Not that I'm aware of.

The RISC-V C API is documented at https://github.com/riscv-non-isa/riscv-c-api-doc. The spec indicates that only regular interrupts are supported via the interrupt attribute. But I see nothing wrong in principle with extending that scheme to support __attribute__((interrrupt("rnmi"))) using mnret.

Silabs-ArjanB commented 1 month ago

Thank you for your feedback @aswaterman .