Closed yf13 closed 1 month ago
There are only two possible explanations: the M-mode software forgot to set mstatus.FS to a nonzero value, or the QEMU instance had floating-point disabled.
Except epc == 4d44 points to the frcsr, therefore the fsd must have executed without exception (so mstatus.FS must be nonzero)
On Sat, Oct 5, 2024 at 11:37 PM Andrew Waterman @.***> wrote:
There are only two possible explanations: the M-mode software forgot to set mstatus.FS to a nonzero value, or the QEMU instance had floating-point disabled.
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many thanks @aswaterman and @allenjbaum. Here my FS field is 0, so it is case 1 above.
When saving context, we should:
mstatus
to t0
and check t0.FS
field;fcsr
) when t0.FS
is Dirty
, and update t0.FS
field to Clean
t0
as mstatus to stack;When resuming context, we should:
mstatus.FS
to t0
from stackt0.FS
is Clean
, load float regs (w/ fcsr
) from stackmstatus
I am wondering that mstatus.FS
field may change implicitly when float registers are updated, so we should update mstatus after recovering the float registers?
The act of loading the float registers in the context-restore code will change FS to Dirty, so you should change FS to Clean after performing the loads.
The act of loading the float registers in the context-restore code will change FS to Dirty, so you should change FS to Clean after performing the loads.
Thanks. Then if FS was Initial
upon context resuming, we shall do fmv.w.x ft0, zero
alike to set float registers to zero, then set FS to Clean
afterwards?
That’s the right idea, but in that case, you can set it to Initial rather than Clean.
thanks again. I'll continue check why FS became 0.
Dear experts,
I got exception
Illegal instruction fault(2)
withmepc=80004d44
andmtval=0
when running M-mode program on QEMU RiscV target. The code fragment looks like:Could someone kindly teach what this exception means here?