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RISC-V Instruction Set Manual
https://riscv.org/
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new WFMI instruction - wait for mode's interrupts #700

Open dansmathers opened 3 years ago

dansmathers commented 3 years ago

based on discussion in https://github.com/riscv/riscv-fast-interrupt/issues/31 Adding here for better issue tracking.

Kasanovic: I had a discussion with Andrew and we came up with what we believe is a clean solution, which is to add a new WFMI instruction ("wait for mode's interrupts"). This instruction only has to wakeup for pending-and-enabled interrupts in the current mode, and is not required to wakeup for lower modes (pending-enabled higher-mode interrupts will just interrupt as usual). Making a new instruction avoids having to deal with state (which could be separate bits for each privileged mode) and we don't believe there is an important use case that wants to modulate the behavior of fixed binary code with WFI by changing a state setting.

The encoding is same as WFI except with bit 28 clear. This also provides a true user-mode WFMI, whereas existing WFI is encoded as a supervisor mode instruction, with exception to allow use at user-mode. The encoding also means a simple legal implementation can simply merge WFI/WMFI in hardware treating bit 28 as don't care (though losing benefit of selective wakeup).

@aswaterman Andrew will be bringing up privileged list for discussion as a general, hopefully fast-track, extension.

aswaterman commented 3 years ago

Note I've written a draft of the spec here: https://github.com/riscv/riscv-isa-manual/commit/6e918941a792921418699d7dfa596e178fd0ea5a

PrivArch is prioritizing some older pending extensions, so it will be a little while before we get to this one.