Instruction-address-misaligned exceptions v.s. compressed instructions

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RISC-V Instruction Set Manual

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Instruction-address-misaligned exceptions v.s. compressed instructions #856

Open SimonSapin opened 2 years ago

SimonSapin commented 2 years ago

https://github.com/riscv/riscv-isa-manual/blob/4a01cbb56412d60c18269d78b3468b9de6c34049/src/rv32.tex#L813-L821

This normative paragraph and this commentary seem to contradict each other. I suspect that the former should read instead:

[…] if the target address is not aligned to an IALIGN-bit boundary.

aswaterman commented 2 years ago

The quoted normative statement is true for the base ISA, which has IALIGN=32. This constraint is relaxed by extensions that reduce IALIGN. But it might be clearer to express the constraint in terms of IALIGN here.