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riscv / riscv-j-extension

Working Draft of the RISC-V J Extension Specification
https://jira.riscv.org/browse/RVG-128
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xMTE.PM accessibility a #2

Closed allenjbaum closed 11 months ago

allenjbaum commented 4 years ago

This spec says:

PM bits from MMTE register are accessible in all modes ((V)U/VS/HS/M)
By default, only higher privileged code can set the value for PM bits. 
However, higher privileged code can enable PM.Current bit for lower privileged code.

First: acessibility in all which is clearly not the case; only the PM bits for the current mode and those of lower privilege levels are accessible. MMTE only contains U-mode PM bits, and it will trap if it tries to access any of the more privileged mode restricted view xMMTEs, so they are not accessible.

Secondly: while you state that "only higher privileged code can set the value for PM bits" the spec doesn't specify what happens if an attempt is made to do that- is it ignored or does it trap? If it traps, what is the trap cause? Also, does "set" mean actually set a (visible RW) bit to one, or does it mean any write to the MMTE corresponding to the current mode when PM_current for that mode is zero? (this is a rhetorical question; I think it must trap)

Thirdly: this would become much more readable if the figures were combined so 1abcd is a single figure with a header that includes the mode and all the bit numbers, followed by 4 lines of CSR format (aligned to each other), one per mode.

mmte

martinmaas commented 11 months ago

This issue refers to an old version of the spec and the new version no longer supports the Current bit and restricting accessibility to the PM bits. As such, this issue is likely obsolete now.