It's not very clear in spec what is meant when it says "instruction fetch will be subject to pointer masking"
It might be more cleaner if a tighter definition is provided along with it's own section/chapter on instruction fetches and pointer along following lines.
Instruction fetch and pointer masking
If pointer masking for instruction fetching is enabled in current mode then all operations which lead to PC being changed, before fetch happens ignore transformation will be performed on address contained in PC before being sent to MMU.
Operations which lead to PC being changed can be:-
Monotonic PC increase due to straight line execution
Indirect call/jmp/ret
Conditional branches
Direct jmp/call
sret/mret (should sret/mret transform PC depending on which mode its going back to and current PM settings for instr fetch?_
It's not very clear in spec what is meant when it says "instruction fetch will be subject to pointer masking"
It might be more cleaner if a tighter definition is provided along with it's own section/chapter on instruction fetches and pointer along following lines.
Instruction fetch and pointer masking
If pointer masking for instruction fetching is enabled in current mode then all operations which lead to PC being changed, before fetch happensignore transformation
will be performed on address contained in PC before being sent to MMU.Operations which lead to PC being changed can be:-