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riscv / riscv-j-extension

Working Draft of the RISC-V J Extension Specification
https://jira.riscv.org/browse/RVG-128
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Inconsistency in text regarding PM.Current #3

Closed spacemonkeydelivers closed 11 months ago

spacemonkeydelivers commented 4 years ago

Hi,

I believe there's small inconsistency in PM spec text. Quotes from the spec:

1 – xPMMASK and xPMBASE registers can be modified by the same privilege level

However, higher privileged code can enable PM.Current bit for lower privileged code. In such scenario, current privilege code has a possibility to self-manage its own configuration of PM bits.

If I get the idea right, PM.Current=1 allows to modify xPMMASK, xPMBASE and xMTE registers. If this assumption is right, could we please update the text?

Another thing that might be worth mentioning: I believe we might want to add a note, that M-mode could update any register it wants, despite PM.Current=0. This is pretty obvious, but may be it's still good idea to state clearly in the text?

Thanks

martinmaas commented 11 months ago

This issue refers to an old version of the spec and the new version no longer supports the PM.Current bit. I therefore believe this issue no longer applies and will close it for now.