Open ghost opened 1 year ago
For pointer masking, there are implementations for Spike and QEMU. However, these implementations are based on a very old version of the standard and will need to be updated once the architecture review committee approves the new version.
For instruction/data consistency, there will need to be a proof of concept simulator implementation, but this work has not started yet and needs to wait for the standard to be finalized.
Does RISC-V J Extension have specific implementations of software simulators, such as Spike and Gem5?