Masking arbitrary bits vs masking upper N bits

riscv / riscv-j-extension

Working Draft of the RISC-V J Extension Specification

https://jira.riscv.org/browse/RVG-128

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Masking arbitrary bits vs masking upper N bits #36

Closed janhoogerbrugge closed 1 year ago

janhoogerbrugge commented 1 year ago

Hi,

In v0.1 one could mask arbitrary bits of an address while in v0.4 one could only mask the upper N bits. What was the motivation for this change? Masking arbitrary bits is more generic and could enable certain constructs.

What is the planning for this extension? How far is it from final?

Jan.

martinmaas commented 1 year ago

This change was requested during architecture review. The motivation is that masking arbitrary bits adds an additional delay to the TLB access path, which is on the critical path of many implementations.

We believe the latest version (0.5.4) is very close to what we are hoping to ratify, but there may still be changes.