2-stage translation with Ssnpm

riscv / riscv-j-extension

Working Draft of the RISC-V J Extension Specification

https://jira.riscv.org/browse/RVG-128

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2-stage translation with Ssnpm #66

Closed jiahzhang closed 4 months ago

jiahzhang commented 4 months ago

In section 3.5, the spec says

When running with virtualization in VS/VU mode with vsatp.MODE = Bare, this means that those two bits may be subject to pointer masking, depending on hgatp.MODE and senvcfg.PMM.

Should this not say "either henvcfg.PMM (for VS) or senvcfg.PMM (for VU)"?

martinmaas commented 4 months ago

Yes, that's correct – I will add clarification to the text. I will leave this issue open until then.

martinmaas commented 4 months ago

This should be addressed as of 567bbd0.