Open dansmathers opened 8 months ago
update CSR_MINTSTATUS, CSR_SINTSTATUS, CSR_UINTSTATUS addresses to read-only csr addresses and add CSR_MINTTHRESH, CSR_SINTTHRESH, CSR_UINTTHRESH csrs.
spec: https://github.com/riscv/riscv-fast-interrupt
Please see pull #226
pinging. Can this be reviewed? It holds up sail/arch tests/spike/gcc/llvm. Thanks
update CSR_MINTSTATUS, CSR_SINTSTATUS, CSR_UINTSTATUS addresses to read-only csr addresses and add CSR_MINTTHRESH, CSR_SINTTHRESH, CSR_UINTTHRESH csrs.
spec: https://github.com/riscv/riscv-fast-interrupt
Please see pull #226