riscv / riscv-test-env

https://jira.riscv.org/browse/RVG-141
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Tests with virtual memory do not work on randomize RAM #5

Closed pentin-as closed 7 years ago

pentin-as commented 7 years ago

https://github.com/riscv/riscv-test-env/blob/db0bfa223142e56b17dae6d92610f195014bbb80/v/vm.c#L132

I have RAM with random values. When I run the -v- tests, they fall. The selected assert does not pass. cause of the trap is CAUSE_FETCH_PAGE_FAULT instead of CAUSE_STORE_PAGE_FAULT. I fall into the branch with assert because user_l3pt [addr / PGSIZE] contains bit A. However, it does not contain bit V. If I reset all memory intended for PAGE TABLE, the test passes.

aswaterman commented 7 years ago

The bss section must be zero initially. This is by design.

pentin-as commented 7 years ago

When I compile the C code without the "-nostartfiles" key, the bss section is reset to zero by the crt0 library. It is logical that if the tests are compiled with the "-nostartfiles" key, they should have a code analog from the crt0 library.

https://github.com/riscv/riscv-newlib/blob/f2ab66c9c1c90f74959ff47394b74dfaacdb125f/libgloss/riscv/crt0.S#L16

aswaterman commented 7 years ago

It varies from platform to platform as to whether bss is zeroed a priori. The RISC-V tests assume they are loaded by a loader that zeros the bss. Since your loader is capable of dumping in the nonzero bits, the path of least resistance is to have it zero the bss, too.